Cmos Analog Current-mode Multiplier with High Linearity and Low Sensitivity

This work presents a four-quadrant current-mode CMOS multiplier structure based on the Advanced Compact MOSFET (ACM) Model. On the contrary of most traditional approaches for implementing CMOS multipliers, the proposed configuration is valid in the whole inversion regime of the MOS transistor, providing wide input range and improved linearity. The main theoretical principle of our multiplier lies on the quadratic relationship between the forward saturation component of drain current and source transconductance, according to ACM model. The source transconductance of a device operating in the linear region is almost proportional to the current signal. This transconductance is mirrored to another device operating in saturation. The proposed architecture is compared with other current mode circuits regarding some performance features, such as linearity, harmonic distortion, dynamic input range and mismatch sensitivity.